NEC PD75P402 Instrukcja Użytkownika Pobierz pdf (Strona 45)

CHAPTER 4. INTERNAL CPU FUNCTIONS

(2) Peripheral hardware area

The peripheral hardware area is mapped to memory bank 15’s addresses F80H to FFFH.

The operation is performed by the memory manipulation instruction just as in the static RAM. In the peripheral

hardware, however, the operable bit unit differs from one address to another. It is impossible to access an address

to which the peripheral hardware is not assigned since the data memory is not built in. (See Table 3-4 “

PD75402A

I/O Map".)

Note The static RAM is indefinite at reset. Therefore, it should be initialized to zero at the beginning of the

program (RAM clear). This must be carried out for sure to avoid unexpected bugs.

Example Clear all the areas (00H to 3FH) of the static RAM (FFH remains in the HL register, however).

MOV HL, #3FH

MOV A, #0H

LOOP: MOV @HL, A: Clear (0) 00H to 3FH

DECS L

BR LOOP

DECS H

BR LOOP

1 2 ... 40 41 42 43 44 45 46 47 48 49 50 ... 194 195

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NEC PD75P402 Instrukcja Użytkownika Strona 45