
CHAPTER 1 INTRODUCTION
28
Preliminary User’s Manual S15543EJ1V0UM
1.5.3 System controller
System Controller is
µ
PD98502’s internal system controller. System Controller provides bridging function among
the VR
4120A System Bus “SysAD”, NEC original high-speed on-chip bus “IBUS” and memory bus for
SDRAM/PROM/Flash.
Features of System Controller are as follows;
• Implements 4-word prefetch FIFO buffer between SysAD and Memory
• Implements 32-bit×64-word FIFO buffer for each Tx and Rx to IBUS
• Implements 32-bit× 4-word FIFO buffer for each Tx and Rx to HBUS
• Provides bus bridging function among SysAD bus and IBUS (internal bus) and Memory
• Supports Endian Converting function on SysAD bus
• Can directly connect SDRAM (MAX. 32 MBytes) and PROM/Flash (MAX. 8 MBytes) memory
• Supports all V
R
4120A bus cycles at 66 MHz or 100 MHz
• PROM/Flash data signals multiplexed on SDRAM data signals
• Supports 266-MB/sec (32 bits @66 MHz) bursts on IBUS
• Generates NMI and INT
• Supports NS16550 compatible Universal Asynchronous Receiver/Transmitter (UART)
• Supports separated 2-ch Timer
• Supports Deadman’s Switch Unit (Watch Dog Timer)
• Supports Micro Wire interface
Figure 1-5. Block Diagram of System Controller
System Controller
IBUS
SysAD BUS
PHB
PBUS-HBUS Bridge
PFUR
FAST-UART
HARB
HBUS Arbiter
IHB
IBUS-HBUS Bridge
Flash
PROM
SDRAM
RS-232C/Micro Wire
HBUS
HBUS
HBUS
PBUS
ROM-IF
SDRAM-IF
System
Bridge
Memory
Arbitor
HBUS
MIF HIF
VRIF
DSU
TIMER
REGISTER
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